TPS73633DBVR

TPS73633DBVR.pdf

Features of the TPS736

Stable without output capacitance or any value

Or capacitor type

The input voltage range is 1.7 V to 5.5 V

Ultra-low differential voltage: 75mv (typical) 

Excellent load transient response-band or

No optional output capacitor

The new NMOS topology provides low reverse leakage

Current

Low Noise: 30 μvrms typical

(10 Hz to 100 Hz) 

0.5% initial accuracy

1% overall accuracy in line, load and

Temperature

The maximum IQ at turn-off is less than 1 ΜA

Mode

Heat off and specified minimum/maximum current

Limit protection

Multiple output voltage versions are available

1.20 V to 5.0 V fixed output

1.20 V to 5.5 V adjustable output

Provides custom output

Application

Portable/battery powered equipment

Post-adjustment of switching power supply

VCO noise sensitive circuit

Load Point adjustment of DSP and FPGA,

aSIC and microprocessor

C2000 is the trademark of Texas Instruments

All other trademarks are the property of their respective owners

Description of TPS 736

The TPS736XX series low voltage drop (LDO) linear regulators use a new topology: the NMOS transmission element in the voltage follower configuration. This topology is stable using low ESR output capacitors and even allows operation without capacitors. It also provides high reverse blocking (low reverse current) and nearly constant grounding pin current over all output current values.

The TPS736XX uses the advanced BiCMOS process to achieve high accuracy while providing extremely low voltage drop and low grounding pin current. When not enabled, current consumption is less than 1 ΜA, making it ideal for portable applications. Extremely low output noise (30 μvrms and 0.1 μf CNR) is ideal for VCO power. These devices are protected by thermal shutdown and reentry current limitations.

Application

• Portable/battery-powered equipment

• rear adjustment of switching power supply

• Noise sensitive circuits, such as VCO

• Load Point adjustment of DSP and FPGA,

aSIC and microprocessor